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UNISONIC TECHNOLOGIES CO., LTD L2572
WIDEBAND PLL FM DEMODULATOR
DESCRIPTION
As a wideband PLL FM demodulator, the UTC L2572 is intended for application in satellite tuners primarily. The device includes all the necessary elements, with external oscillator sustaining network and the exception of loop feedback components, to form a PLL system operating at frequencies up to 800MHz completely. An AFC with window adjust (whose output signal can be used to correct for any frequency drift at the head end local oscillator) is provided.
LINEAR INTEGRATED CIRCUIT
SOP-16
*Pb-free plating product number: L2572L
FEATURES
* Constant voltage and constant current control * Single chip PLL system for wideband FM demodulation * Simple low component count application * Allows for application of threshold extension * Fully balanced low radiation design * High operating input sensivity * Improved VCO stability with variations in supply or temperature * AGC detect and bias adjust * 75 video output drive with low distortion levels * Dynamic self biasing analog AFC * Full ESD Protection
ORDERING INFORMATION
Ordering Number Normal Lead Free Plating L2572-S16-R L2572L-S16-R L2572-S16-T L2572L-S16-T Package SOP-16 SOP-16 Packing Tape Reel Tube
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PIN CONFIGURATION
LINEAR INTEGRATED CIRCUIT
PIN DESCRIPTION
PIN NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 PIN NAME AFC PUMP AFC WINDOW ADJUST VEE OSCILLATOR+ OSCILLATORAGC BIAS AGC OUTPUT RF INPUT RF INPUT VIDEO OUTPUT VIDEO FEEDBACKVIDEO+ VIDEOVIDEO FEEDBACK+ VCC AFC OUTPUT I/O I I I I I O I I O I O O I O DESCRIPTION Current pump, integrating the signal pulses into a DC voltage Set the AFC deadband voltages corresponding the frequency GND Oscillator positive signal Oscillator negative signal Set the AGC bias Output AGC DC voltage Input signal Input signal Output video signal Feedback the video negative signal Video positive signal Video negative signal Feedback the video positive signal Input VCC Output AFC DC voltage
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L2572
BLOCK DIAGRAM
LINEAR INTEGRATED CIRCUIT
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L2572
TEST CONFIGURATION
LINEAR INTEGRATED CIRCUIT
BASE BAND VIDEO 1V p
p TV SAT TEST TX ROHDE & SCHWARZ SFZ
VIDEO GENERATOR ROHDE & SCHWARZ SGPF RF CARRIER FREQ 479.5MHz FM MODULATION 13.5MHz P P PRE EMPHASISED VIDEO
MONTFORD TEST OVEN
TEST APPLICATION BOARD See Fig. 1 for details
PRE EMPHASISED BASE BAND VIDEO VIDEO AMPLIFIER/ DE EMPHASISED NETWORK DE EMPHASISED BASE BAND VIDEO 1V p p VIDEO ANALYSER ROHDE & SCHWARZ UAF Using the above test configuration the video drive characteristics measurements were made. In the Electrical Characteristics Table the maximum figures recorded coincide with extremes of supply voltage and high temperatures. There's no adjustment to the recorded figures has been made to compensate for the effects of temperature on the external components of the application test board, in the varactor diodes particularly. Attention to temperature compensation of the external circuitry will result in performance figures closer to the stated typical figures if operation of the device at high ambient temperatures is envisaged.
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L2572
ABSOLUTE MAXIMUM RATINGS (VEE 0V)
LINEAR INTEGRATED CIRCUIT
PARAMETER SYMBOL RATINGS UNIT Supply Voltage VCC -0.3~7 V RF Input Voltage VIN(RF) 2.5 VP-P RF Input DC Offset VIN_RF(OFF) -0.3~VCC+0.3 V Oscillator DC Offset VOSC(OFF) -0.3~VCC+0.3 V Video DC Offset -0.3~VCC+0.3 V VVDO(OFF) Video Feedback DC Offset -0.3~VCC+0.3 V -0.3~VCC+0.3 Video Output DC Offset V AFC Pump DC Offset -0.3~VCC+0.3 V VAFC(OFF) AFC Disable DC Offset -0.3~VCC+0.3 V -0.3~VCC+0.3 AFC Deadband DC Offset V AGC Bias DC Offset -0.3~VCC+0.3 V VAGC(OFF) AGC Output DC Offset -0.3~VCC+0.3 V Power Dissipation (at 5.5V) PD 250 mW ESD Protection - Pin 1 to 15 2 kV ESD ESD Protection - Pin 16 1.7 kV Junction Temperature TJ 150 C Storage Temperature TSTG -55~125 C Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied.
THERMAL DATA
Parameter Junction to Ambient Junction to Case SYMBOL JA JC RATINGS 111 41 Unit C/W C/W
ELECTRICAL CHARACTERISTICS
(Ta = -20C~+80C, VCC = +4.5V ~ +5.5V. Either design or production test guarantee the electrical characteristics. Unless otherwise stated they apply within the specified ambient temperature and supply voltage.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNIT Supply Current VCC 36 40 mA Operating Frequency FOPR 300 800 MHz Input Sensitivity Preamp limiting -40 dBm Input Overload 0 dBm VCO Sensitivity (dF/dV) Refer to Fig. 1 25 32 39 MHz/V Refer to Fig. 1 with13.5MHz p-p VCO linearity 25 % deviation VCO Supply Stability See note 5 2.0 MHz/V VCO Temperature Stability See note 5 20 KHz/C Differential loop filter 0.5 Phase Detector Gain V/rad Single ended loop filter 0.25 Loop Amplifier Input Impedance RIN 450 570 700 Loop Amplifier Output Impedance ROUT(LOOP) 25 Loop Amplifier Open Loop Gain 38 dB Loop Amplifier Gain Bandwidth Product BW 240 MHz Loop Amplifier Output Swing 1.2 Vp-p Video Drive Output Impedance ROUT(VIDEO) 55 75 95
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ELECTRICAL CHARACTERISTICS(Cont.)
PARAMETER VIDEO DRIVE Luminance Nonlinearity Differential Gain Differential Phase Intermodulation Signal/noise Tilt Baseline Distortion AGC Output Current AGC Bias Current AFC Window Current SYMBOL
LINEAR INTEGRATED CIRCUIT
CONDITIONS 1K load, See note 3 and 4 75K load, See note 3 and 4 75K load, See note 3 and 4 See notes 1, 3 and 4 1K load, See note 2 and 4 1K load, See note 3 and 4 1K load, See note 3 and 4 Maximum load voltage drop 2V 400A gives 1.5V deadband window
MIN
TYP 1.9 0.5 1.0
MAX 5 2.5 3 -40
UNIT
66
72 0.3 0.4
IOUT IBIAS
10 0 0
% % Degree dB dB % 3 % 2 400 A 250 A 400 A
AFC Charge Pump Current 50 A AFC Leakage Current ILEAK With charge pump disabled 10 A AFC Output Saturation Voltage VO(SAT) AFC output enabled 0.4 V Note 1. Input modulation's product f 1 at 4.43MHz, 13.5MHz p-p deviation and f 2 at 6MHz p-p deviation, (PAL chroma and sound subcarriers). 2. To output rms noise in 6MHz bandwidth with no input modulation, ratio of output video signal with input modulation at 1MHz, 13.5MHz p-p deviation. 3. Output voltage is 600mV pk-pk and input test signal pre-emphasised video 13.5MHz p-p deviation. 4. See page 4 5. Assuming ambient temperature of +20C and operating frequency of 479.5MHz set with VCC @ 5.0V. Only applies to application shown in Fig. 1 also refer to Fig. 4.
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L2572
APPLICATION CIRCUIT
LINEAR INTEGRATED CIRCUIT
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L2572
FUNCTIONAL DESCRIPTION
LINEAR INTEGRATED CIRCUIT
The UTC L2572 as optimized for application in satellite receiver systems and requiring a minimum external component count is a wideband PLL FM demodulator. It includes all the elements required to construct a phase locked loop circuit, with the exception of an AFC detector circuit for generation of error signal to correct for any frequency drift in the outdoor unit local oscillator, and tuning components for the local oscillator contains a block diagram and Fig. 1 contains the typical application. Fig. 2-1 contains the internal pin connections In applications the second satellite IF frequency of typically 479.5 or 402MHz is fed to the RF preamplifier normally, which depending on application and layout has a working sensitivity of typically -40 dBm. An RF level detect circuit, which generates an AGC signal that can be used for controlling the gain of the IF amplifier stages is contained in the preamplifier, so it can be maintaining a fixed level to the RF input of the UTC L2572, for optimum threshold performance. The AGC circuit's bias point can be adjusted to cater for device input power and variation in AGC line voltage requirement. Fig. 5 shows the typical AGC curves are shown in. That the device is recommended that be operated with an input signal between -30 and -35dBm. That can ensure optimum linearity and threshold performance, and when over the typical sensitivity of -40dBm can give a good safety margin. The preamplifier's output is fed to the mixer section which is of balanced design for low radiation. In this stage the RF signal is mixed with which is generated by an on-board oscillator, the local oscillator frequency. The oscillator block is optimized for high linearity over the normal deviation range and uses an external varactor tuned sustaining network. Fig. 3 contains a typical frequency versus voltage characteristic for the oscillator. Fig.4 shows the typical stability that he loop output is designed to compensate for first order temperature variation effects. The mixer's output is then fed to the loop amplifier around which feedback is applied to effect loop transfer characteristic. Feedback could be applied either in single ended or differential mode; both modes should give the same loop response if the appropriate phase detector gains are assumed in calculating loop filters. The loop amplifier drives a 75 output impedance buffer amplifier, which could be connected to a 75 load and used to drive a high input impedance stage giving greater linearity and approximately 6dB higher demodulated signal output level too.
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L2572
INTERNAL CIRCUITS
VCC
LINEAR INTEGRATED CIRCUIT
AGC Bias
VREF:2.7V
VREF:2V
AGC Output Fig. 2-1 AGC Output Fig. 2-2 AGC Bias Adjust
VREF:36V
AFC WINDOW 2X1500
RF Input
VREF:1.6V
Fig. 2-3 RF Input
Fig. 2-4 AFC Window Adjust
VCC AFC Pump Video + 10K AFC OUTPUT 330 330 Video -
2mA
2mA
Fig. 2-5 AFC Output Stage
Fig. 2-6 Video Amp Output
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L2572
INTERNAL CIRCUITS(Cont.)
VREF:1.2V
LINEAR INTEGRATED CIRCUIT
From Phase Detector 2x570 2X5K VIDEO FEEDBACK + VIDEO FEEDBACK -
OSCILLATOR + OSCILLATOR -
Fig. 2-7 Local Oscillator
Fig. 2-8 Video amp feedback inputs
VCC 68
Output Video
105
4mA
Fig. 2-9 Video Output Drive
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L2572
LINEAR INTEGRATED CIRCUIT
Frequency (MHz) 2.0 AGC Voltage Output (V) 1.5 1.0
Frequency (MHz)
AGC Bias Resistor 5.1K AGC Bias Current 297 A AGC Load Resistor 3.9K AGC Bias Resistor 10.5K AGC Bias Current 150 A AGC Load Resistor 4.7K AGC Bias Resistor 32K AGC Bias Current 52 A 0 AGC Load Resistor 10K VCC = 5.0 V
0.5
-70
-60
-50
-40
-30
-20
-10
RF Input Level (dBm) Unmodulated
Fig.5 AGC Output Voltage for Differing Values of AGC Bias Resistor
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L2572
DESIGN OF PLL LOOP PARAMETERS
LINEAR INTEGRATED CIRCUIT
The UTC L2572 is normally used as a type 1 second order loop and can be represented by the above diagram. For such a system the following parameters apply; = C1.R1 = C1.R2 and
1 2
2 n 2 2 = n
1 =
K0KD
where: K0 is the VCO gain in radian seconds per volt KD is the phase detector gain in volts per radian n is the natural loop bandwidth is the loop damping factor R1 is loop amplifier input impedance Note: K0 is dependant on sensitivity of VCO used. KD = 0.25V/rad single ended, 0.5V/rad differential From these factors the loop 3dB bandwidth can be determined from the following expression;
2 2 32dB = n (2 2 + 1) n (2 2 + 1) 2 + 1
Which approximates to
3dB = 2 n
when
=
1 2
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L2572
AFC FACILITY
LINEAR INTEGRATED CIRCUIT
An analog frequency error detect circuit, which generates DC voltage proportional to the integral of frequency error is contained in UTC L2572.As the incident RF is high then the AFC voltage increases, as low then the voltage decreases. ADC converts the AFC voltage can then be an to be read by the micro controller for frequency fine tuning. Around the aligned frequency the AFC detect circuit contains a deadband centre. From zero window to approximately 25MHz width assuming an oscillator dF/dV of 15MHz/V the deadband can be adjusted. The AFC voltage does not integrate if the incident RF is within this window, except by component leakage. With reference to Fig. 6; the demodulated video is fed to a dual comparator which can be compared with two reference voltages in normal operation, corresponding to the extremes of the deadband, or window. These voltages are variable and the window adjust input can set it. Two digital outputs corresponding to voltages above or below the voltage window, or frequency above or below deadband can be produced by the comparators. These digital control signals can control a complimentary current source pump. The current signals are then fed to an amplifier's input. it is arranged as an integrator, so integrating the pulses into a DC voltage. Both the current source and sink are disabled if the frequency is correctly aligned, therefore the DC output voltage can be constant. Due to component leakage there will be a small drift; the maximum drift can be calculated from here:
dV I = dt 2500.C
where
I=
Vcc REXT
,
C = CEXT
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LINEAR INTEGRATED CIRCUIT
UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice.
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